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2-Mbit (256K x 8) MoBL

Static RAM

CY62138EV30

MoBL

Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600

Document #: 38-05577 Rev. *A Revised February 14, 2006

Features

• Very high speed: 45 ns

— Wide voltage range: 2.20V – 3.60V

• Pin-compatible with CY62138CV30

• Ultra-low standby power

— Typical standby current: 1 µA

— Maximum standby current: 7 µA

• Ultra-low active power

— Typical active current: 2 mA @ f = 1 MHz

• Easy memory expansion with CE

and OE features

• Automatic power-down when deselected

• CMOS for optimum speed/power

• Offered in Pb-free 36-ball BGA package

Functional Description

[1]

The CY62138EV30 is a high-performance CMOS static RAM

organized as 256K words by 8 bits. This device features

advanced circuit design to provide ultra-low active current.

This is ideal for providing More Battery Life™ (MoBL

) in

portable applications such as cellular telephones. The device

also has an automatic power-down feature that significantly

reduces power consumption. The device can be put into

standby mode reducing power consumption when deselected

(CE

HIGH).

Writing to the device is accomplished by taking Chip Enable

(CE

) and Write Enable (WE) inputs LOW. Data on the eight I/O

pins (I/O

through I/O

) is then written into the location

specified on the address pins (A

through A

Reading from the device is accomplished by taking Chip

Enable (CE

) and Output Enable (OE) LOW while forcing Write

Enable (WE

) HIGH. Under these conditions, the contents of

the memory location specified by the address pins will appear

on the I/O pins.

The eight input/output pins (I/O

through I/O

) are placed in a

high-impedance state when the device is deselected (CE

HIGH), the outputs are disabled (OE HIGH), or during a write

operation (CE

LOW and WE LOW).

Note:

1. For best practice recommendations, please refer to the Cypress application note “System Design Guidelines” on http://www.cypress.com.

Logic Block Diagram

COLUMN

DECODER

ROW DECODER

SENSE AMPS

Data in Drivers

POWER

DOWN

I/O

256K x 8

ARRAY

I/O

[+] Feedback

1 2 3 4 5 6 7 8 9

Résumé du contenu

Page 1 - Static RAM

2-Mbit (256K x 8) MoBL® Static RAMCY62138EV30MoBL®Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Docum

Page 2 - CY62138EV30

CY62138EV30MoBL®Document #: 38-05577 Rev. *A Page 2 of 9Pin Configuration[2]Product PortfolioProductVCC Range (V)Speed (ns)Power DissipationOperating

Page 3

CY62138EV30MoBL®Document #: 38-05577 Rev. *A Page 3 of 9Maximum Ratings(Above which the useful life may be impaired. For user guide-lines, not tested.

Page 4

CY62138EV30MoBL®Document #: 38-05577 Rev. *A Page 4 of 9 Thermal ResistanceParameter Description Test Conditions BGA UnitΘJAThermal Resistance (Junct

Page 5

CY62138EV30MoBL®Document #: 38-05577 Rev. *A Page 5 of 9 Switching Characteristics (Over the Operating Range)[9]Parameter Description45 nsUnitMin. Max

Page 6

CY62138EV30MoBL®Document #: 38-05577 Rev. *A Page 6 of 9Read Cycle No. 2 (OE Controlled)[14, 15]Write Cycle No. 1 (WE Controlled)[16, 18]Notes: 15. Ad

Page 7

CY62138EV30MoBL®Document #: 38-05577 Rev. *A Page 7 of 9 Write Cycle No. 2 (CE Controlled)[16, 18]Write Cycle No. 3 (WE Controlled, OE LOW)[18]Switchi

Page 8

CY62138EV30MoBL®Document #: 38-05577 Rev. *A Page 8 of 9© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to cha

Page 9

CY62138EV30MoBL®Document #: 38-05577 Rev. *A Page 9 of 9Document History PageDocument Title: CY62138EV30 2-Mbit (256K x 8) MoBL® Static RAMDocument Nu

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Cypress CY62138EV30 Manuel d'utilisateur

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