Cypress CY2291 Manuel d'utilisateur

CY2291Three-PLL General Purpose EPROMProgrammable Clock GeneratorCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 40

CY2291Document #: 38-07189 Rev. *C Page 10 of 12 Switching Waveforms SELECTCPUOLD SELECT NEW SELECT STABLEFoldFnewt8&t10Figure 5. CPU Frequency

CY2291Document #: 38-07189 Rev. *C Page 11 of 12Package DiagramFigure 6. 20-Pin (300 MIL) SOIC Package Outline 51-85024 *C[+] Feedback

Document #: 38-07189 Rev. *C Revised September 16, 2008 Page 12 of 12Pentium is a registered trademark of Intel Corporation. CyClocks is a trademark o

CY2291Document #: 38-07189 Rev. *C Page 2 of 12PinoutsFigure 1. CY2291- 20-pin SOIC Pin DefinitionsName Pin Number Description32XOUT 1 32.768-kHz cr

CY2291Document #: 38-07189 Rev. *C Page 3 of 12OperationThe CY2291 is a third-generation family of clock generators. TheCY2291 is upwardly compatible

CY2291Document #: 38-07189 Rev. *C Page 4 of 12Maximum Ratings(Exceeding maximum ratings may shorten the useful life of thedevice. User guidelines are

CY2291Document #: 38-07189 Rev. *C Page 5 of 12Electrical Characteristics, Commercial 3.3VParameter Description Conditions Min. Typ. Max. UnitVOHHIGH-

CY2291Document #: 38-07189 Rev. *C Page 6 of 12VIHHIGH-Level Input Voltage[9]Except crystal pins 2.0 VVILLOW-Level Input Voltage[9]Except crystal pins

CY2291Document #: 38-07189 Rev. *C Page 7 of 12 t10BLock Time for UPLL and SPLLLock Time from Power Up < 0.25 1 msSlew Limits CPU PLL Slew Limits

CY2291Document #: 38-07189 Rev. *C Page 8 of 12Switching Characteristics, Industrial 5.0VParameter Name Description Min. Typ. Max. Unitt1Output Period

CY2291Document #: 38-07189 Rev. *C Page 9 of 12t6Output Enable TimeTime for output to leave three-state mode after SHUTDOWN/OE goes HIGH10 15 nst7Skew