Cypress CY14B104M Spécifications

CY14B104K, CY14B104M4 Mbit (512K x 8/256K x 16) nvSRAM withReal Time ClockCypress Semiconductor Corporation • 198 Champion Court • San Jose,CA 95134-1

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 10 of 33New time out values are written by setting the watchdog write bitto ‘0’. When the WDW i

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 11 of 33with the value 0x00 on power up (except for the OSCF bit. SeeStopping and Starting the

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 12 of 33Table 4. RTC Register Map[8]Register BCD Format Data[9]Function/RangeCY14B104K CY14B10

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 13 of 33Table 5. Register Map DetailRegisterDescriptionCY14B104K CY14B104M0x7FFFF 0x3FFFFTime

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 14 of 33RegisterDescriptionCY14B104K CY14B104M0x7FFF8 0x3FFF8Calibration/ControlD7 D6 D5 D4 D3

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 15 of 33RegisterDescriptionCY14B104K CY14B104M0x7FFF4 0x3FFF4Alarm - HoursD7 D6 D5 D4 D3 D2 D1

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 16 of 33Maximum RatingsExceeding maximum ratings may impair the useful life of thedevice. These

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 17 of 33AC Test ConditionsInput Pulse Levels ...

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 18 of 33RTC Characteristics Parameters Description Min Typ[11]Max UnitsVRTCbatRTC Battery Pin V

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 19 of 33AC Switching Characteristics ParametersDescription25 ns 45 nsUnitCypressParametersAltPa

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 2 of 33ContentsFeatures ...

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 20 of 33Figure 8. SRAM Read Cycle 2: CE and OE Controlled[3, 16, 20] Figure 9. SRAM Write Cyc

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 21 of 33Switching WaveformsFigure 10. SRAM Write Cycle 2: CE Controlled[3, 19, 20, 21]Figure 1

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 22 of 33AutoStore/Power Up RECALLParameters DescriptionCY14B104K/CY14B104MUnitMin MaxtHRECALL [

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 23 of 33Software Controlled STORE and RECALL Cycle In the following table, the software control

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 24 of 33Hardware STORE CycleParameters DescriptionCY14B104K/CY14B104MUnitMin MaxtDHSB HSB To Ou

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 25 of 33Truth Table For SRAM OperationsHSB should remain HIGH for SRAM Operations.For x8 Config

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 26 of 33Part Numbering NomenclatureOrdering InformationSpeed(ns)Ordering CodePackageDiagramPack

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 27 of 33Package Diagrams Figure 17. 44-Pin TSOP II (51-85087)11.938 (0.470)PLANESEATINGTOP VIE

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 28 of 33Figure 18. 54-Pin TSOP II (51-85160)Package Diagrams (continued)51-85160 **[+] Feedba

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 29 of 33Document History PageDocument Title: CY14B104K, CY14B104M 4 Mbit (512K x 8/256K x 16) n

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 3 of 33 PinoutsFigure 1. Pin Diagram - 44-PIn and 54-Pin TSOP II Table 1. Pin DefinitionsPin

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 30 of 33*F 1890926 vsutmp8/AE-SASee ECN Added Footnote 1, 2 and 3.Updated Logic Block diagramUp

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 31 of 33*J 2600941 GVCH/PYRS 11/04/08 Removed 15 ns access speed from “Features”Changed part nu

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 32 of 33*K 2653928 GVCH/PYRS 02/04/09 Changed Part number from CY14B104KA/CY14B104MA to CY14B10

Document #: 001-07103 Rev. *O Revised December 08, 2009 Page 33 of 33All products and company names mentioned in this document are the trademarks of t

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 4 of 33Device OperationThe CY14B104K/CY14B104M nvSRAM is made up of twofunctional components pa

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 5 of 33Figure 2 shows the proper connection of the storage capacitor(VCAP) for automatic STORE

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 6 of 33Preventing AutoStoreThe AutoStore function is disabled by initiating an AutoStoredisable

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 7 of 33Best PracticesnvSRAM products have been used effectively for over 15 years.While ease-of

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 8 of 33Data ProtectionThe CY14B104K/CY14B104M protects data from corruptionduring low voltage c

CY14B104K, CY14B104MDocument #: 001-07103 Rev. *O Page 9 of 33must be set to ‘1’. This turns off the oscillator circuit, extendingthe battery life. If