Cypress CY62158EV30 Manuel d'utilisateur télécharger pdf (Page 12)

12 September 5, 2010

 Dimensions (excluding LCD panel):

– 4.50” x 4.25” x 0.60” (LxWxH) with SDRAM board

– 4.50” x 4.25” x 0.75” (LxWxH) with EPI breakout board

 Analog Reference: 3.0 V +/-0.2%

 RoHS status: Compliant

NOTE: When the LM3S9B96 Development Board is used in USB Host mode, the host connector

is capable of supplying power to the connected USB device. The available supply current

is limited to ~200 mA unless the development board is powered from an external 5 V

supply with a =600mA rating.

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 80 81

User’s Manual 1
Copyright 2
Table of Contents 3
4 September 5, 2010 4
List of Figures 5
List of Tables 6
CHAPTER 1 7
8 September 5, 2010 8
September 5, 2010 9 9
Development Kit Contents 10
Block Diagram 11
12 September 5, 2010 12
Hardware Description 13
CHAPTER 2 13
Clocking 14
Power Supplies 15
Debugging 16
Color QVGA LCD Touch Panel 17
Control Interface 18
Backlight 18
Resistive Touch Panel 18
User Switch and LED 19
20 September 5, 2010 20
Peripheral Interface (EPI) 21
CHAPTER 3 21
22 September 5, 2010 22
CHAPTER 4 23
24 September 5, 2010 24
Schematics 25
APPENDIX A 25
Schematic page 1 26
Schematic page 2 27
Schematic page 3 28
Schematic page 4 29
SDRAM Expansion Board 30
EPI Signal Breakout Board 30
Schematic page 6 31
32 September 5, 2010 32
Component Locations 33
APPENDIX B 33
34 September 5, 2010 34
Center Positive (+) 35
36 September 5, 2010 36
APPENDIX D 37
40 September 5, 2010 40
Expansion Board 41
APPENDIX E 41
42 September 5, 2010 42
Remove board 42
Remove jumpers 42
44 September 5, 2010 44
Memory Map 45
Flash, SRAM 47
LCD Interface 48
LCD_DECODE CPLD 48
APPENDIX F 49
Installation 50
Using the Widget Interface 53
Register Descriptions 55
System Control Register 56
Interrupt Enable Register 57
Interrupt Status Register 57
Memory Page Register 58
Test PadRegister 58
LCD Control Register 58
60 September 5, 2010 60
Memory Port Register 61
Memory Window Register 61
Installing the Software 62
Modifying the Default Image 62
Default FPGA Image Blocks 62
EPI Signal Descriptions 63
EPI, LCD, Camera I/F 66
SRAM, Power, JTAG 67
Tactile Switch 67
68 September 5, 2010 68
APPENDIX G 69
Male EPI expansion connector 71
Bottom side of EM2 module 71
72 September 5, 2010 72
EM2 Expansion Board 78
References 79
APPENDIX H 79
80 September 5, 2010 80
IMPORTANT NOTICE 81

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