Cypress CY14E102L Manuel d'utilisateur

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ADVANCE
CY14E102L, CY14E102N
2-Mbit (256K x 8/128K x 16) nvSRAM
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 001-45755 Rev. *A Revised June 27, 2008
Features
15 ns, 20 ns, 25 ns, and 45 ns access times
Internally organized as 256K x 8 (CY14E102L) or 128K x 16
(CY14E102N)
Hands off automatic STORE on power down with only a small
capacitor
STORE to QuantumTrap
nonvolatile elements initiated by
software, device pin, or AutoStore
on power down
RECALL to SRAM initiated by software or power up
Infinite read, write, and recall cycles
200,000 STORE cycles to QuantumTrap
20 year data retention
Single 5V +10% operation
Commercial and Industrial temperatures
48-pin FBGA, 44 and 54-pin TSOP II packages
Pb-free and RoHS compliance
Functional Description
The Cypress CY14E102L/CY14E102N is a fast static RAM, with
a nonvolatile element in each memory cell. The memory is
organized as 256K words of 8 bits each or 128K words of 16 bits
each. The embedded nonvolatile elements incorporate
QuantumTrap technology, producing the world’s most reliable
nonvolatile memory. The SRAM provides infinite read and write
cycles, while independent nonvolatile data reside in the highly
reliable QuantumTrap cell. Data transfers from the SRAM to the
nonvolatile elements (the STORE operation) takes place
automatically at power down. On power up, data is restored to
the SRAM (the RECALL operation) from the nonvolatile memory.
Both the STORE and RECALL operations are also available
under software control.
Note
1. Address A
0
- A
17
and Data DQ0 - DQ7 for x8 configuration, Address A
0
- A
16
and Data DQ0 - DQ15 for x16 configuration.
A
0
- A
17
Address
WE
OE
CE
V
CC
V
SS
V
CAP
DQ0 - DQ7
HSB
CY14E102L
BHE
BLE
Logic Block Diagram
[1]
[1]
CY14E102N
[+] Feedback
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Résumé du contenu

Page 1 - CY14E102L, CY14E102N

ADVANCECY14E102L, CY14E102N2-Mbit (256K x 8/128K x 16) nvSRAMCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-94

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 10 of 21AutoStore and Power Up RECALLParameters DescriptionCY14E102L/CY14E102NUnitM

Page 3 - DQ0 – DQ15

ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 11 of 21 Switching Waveforms Figure 5. SRAM Read Cycle #1: Address Controlled[12,

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 12 of 21Figure 7. SRAM Write Cycle #1: WE Controlled[13, 21, 22, 23] Figure 8. SR

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 13 of 21Figure 9. AutoStore or Power Up RECALL[26]Figure 10. CE Controlled Softwa

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 14 of 21 Figure 11. OE Controlled Software STORE/RECALL Cycle[19]Figure 12. Hardw

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 15 of 21Ordering InformationSpeed(ns)Ordering CodePackageDiagramPackage TypeOperati

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 16 of 2125 CY14E102L-ZS25XCT 51-85087 44-pin TSOP II CommercialCY14E102L-ZS25XIT 51

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 17 of 21Part Numbering NomenclatureOption:T - Tape & ReelBlank - Std.Speed:20 -

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 18 of 21Package Diagrams Figure 14. 44-Pin TSOP II MAXMIN.DIMENSION IN MM (INCH)11

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 19 of 21Figure 15. 48-Ball FBGA - 6 mm x 10 mm x 1.2 mmPackage Diagrams (continue

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 2 of 21Pinouts Figure 1. Pin Diagram - 48 FBGA (Top View)Figure 2. Pin Diagram -

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 20 of 21Figure 16. 54-Pin TSOP II Package Diagrams (continued)51-85160-**[+] Feed

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Document Number: 001-45755 Rev. *A Revised June 27, 2008 Page 21 of 21AutoStore and QuantumTrap are registered trademarks of Simtek Corporation. All p

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 3 of 21 Figure 3. Pin Diagram - 54 TSOP II (Top View)Pinouts (continued)NCDQ7DQ6D

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 4 of 21Device OperationThe CY14E102L/CY14E102N nvSRAM is made up of twofunctional c

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 5 of 21Hardware RECALL (Power Up)During power up or after any low power condition(V

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 6 of 21Preventing AutoStoreThe AutoStore function is disabled by initiating an Auto

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 7 of 21Maximum RatingsExceeding maximum ratings may impair the useful life of thede

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 8 of 21AC Test ConditionsInput Pulse Levels ....

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ADVANCECY14E102L, CY14E102NDocument Number: 001-45755 Rev. *A Page 9 of 21AC Switching Characteristics The following table lists the AC switching char

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