EZ-USB AT2LP™ USB 2.0 to ATA/ATAPI BridgeCY7C68300C/CY7C68301CCY7C68320C/CY7C68321CCypress Semiconductor Corporation • 198 Champion Court • San Jose,
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 10 of 4268 34 41 DA0 O/Z[1]Driven HIGH after 2 ms delayATA address.69 35 42
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 11 of 42Additional Pin DescriptionsThe following sections provide additional
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 12 of 42SYSIRQThe SYSIRQ pin provides a way for systems to request servicefr
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 13 of 42Figure 8. SYSIRQ Latching AlgorithmDRVPWRVLDWhen this pin is enable
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 14 of 42interface and the attached mass storage device, especially ifUltra D
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 15 of 42HID Functions for Button ControlsCypress’s CY7C68320C/CY7C68321C has
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 16 of 42 Table 6. ATACB Field DescriptionsByte Field Name Field Description0
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 17 of 423 bmATACBRegisterSelect This field controls which of the taskfile re
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 18 of 42Operating Modes The different modes of operation and EEPROM informat
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 19 of 42Fused Memory DataWhen no EEPROM is detected at startup, the AT2LPenu
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 2 of 42ApplicationsThe CY7C68300C/301C and CY7C68320C/321A implementa USB 2.
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 20 of 42MfgCBThe mfg_load and mfg_read vendor-specific commands arepassed do
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 21 of 42EEPROM OrganizationThe contents of the recommended 256-byte (2048-bi
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 22 of 42Table 11.Configuration Data Organization ByteAddressConfigurationIte
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 23 of 42SRST Enable Bit 1Determines if the AT2LP is to do an SRST reset duri
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 24 of 420x08 BUTTON_MODE Bit 7Button mode (100-pin package only). Sets ATAPU
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 25 of 420x0A ReservedGPIO Output Pin StateBits 7:6Reserved. Must be set to z
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 26 of 420x12 bcdUSB (LSB) USB Specification release number in BCD 0x000x13 b
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 27 of 420x32 iConfiguration Index to the configuration string. This entry mu
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 28 of 420x4F bAlternateSetting Alternate setting 0x000x50 bNumEndpoints Numb
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 29 of 420x75 Report_Size 8 bits 0x750x76 0x080x77 Report_Count 2 fields 0x95
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 3 of 42Pin DiagramsThe AT2LP is available in different package types to meet
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 30 of 420x95 bRecipient Identifier of the target recipientIf Recipient type
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 31 of 420xB5 bString Unicode character LSB ’ ’ 0x200xB6 bString Unicode char
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 32 of 420xDF bString Unicode character LSB ’ ’ 0x200xE0 bString Unicode char
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 33 of 42Note: More than 0X100 bytes of configuration are shown for example o
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 34 of 42Legal values for wValue are as follows: • 0x0000 Internal Config byt
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 35 of 42Absolute Maximum RatingsStorage Temperature ...
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 36 of 42AC Electrical CharacteristicsATA Timing CharacteristicsThe ATA inter
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 37 of 42Package DiagramsFigure 12. 100-Pin Thin Plastic Quad Flatpack (14 x
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 38 of 42Figure 13. 56-lead Shrunk Small Outline Package 056Package Diagrams
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 39 of 42General PCB Layout Recommendations For USB Mass Storage DesignsThe f
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 4 of 42Figure 3. 56-pin QFN Pinout (CY7C68300C/CY7C68301C)RESET#GNDARESET#D
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 40 of 42Quad Flat Package No Leads (QFN) Package Design NotesElectrical cont
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 41 of 42© Cypress Semiconductor Corporation, 2006. The information contained
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 42 of 42Document History PagedDescription Title: CY7C68300C/CY7C68301C/CY7C6
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 5 of 42Figure 4. 56-pin SSOP Pinout (CY7C68320C/CY7C68321C)5678910111213141
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 6 of 42Figure 5. 56-pin QFN Pinout (CY7C68320C/CY7C68321C)GNDVCCGPIO2 GNDD
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 7 of 42Figure 6. 100-pin TQFP Pinout (CY7C68320C/CY7C68321C only)1009998979
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 8 of 42Pin DescriptionsThe following table lists the pinouts for the 56-pin
CY7C68300C/CY7C68301CCY7C68320C/CY7C68321CDocument 001-05809 Rev. *A Page 9 of 4230 16 23 SDA IO Data signal for I2C interface. (See “SCL, SDA” on pag
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