Cypress MoBL CY62148BN Manuel d'utilisateur

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4-Mbit (512K x 8) Static RAM
CY62148BN MoBL
®
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document #: 001-06517 Rev. *A Revised August 2, 2006
Features
High Speed
—70 ns
4.5V–5.5V operation
Low active power
Typical active current: 2.5 mA @ f = 1 MHz
Typical active current:12.5 mA @ f = f
max
(70 ns)
Low standby current
Automatic power-down when deselected
TTL-compatible inputs and outputs
Easy memory expansion with CE
and OE features
CMOS for optimum speed/power
Available in standard lead-free and non-lead-free
32-lead (450-mil) SOIC, 32-lead TSOP II and 32-lead
Reverse TSOP II packages
Functional Description
The CY62148BN is a high-performance CMOS static RAM
organized as 512K words by 8 bits. Easy memory expansion
is provided by an active LOW Chip Enable (CE), an active
LOW Output Enable (OE
), and three-state drivers. This device
has an automatic power-down feature that reduces power
consumption by more than 99% when deselected.
Writing to the device is accomplished by taking Chip Enable
(CE
) and Write Enable (WE) inputs LOW. Data on the eight I/O
pins (I/O
0
through I/O
7
) is then written into the location
specified on the address pins (A
0
through A
18
).
Reading from the device is accomplished by taking Chip
Enable (CE
) and Output Enable (OE) LOW while forcing Write
Enable (WE
) HIGH for read. Under these conditions, the
contents of the memory location specified by the address pins
will appear on the I/O pins.
The eight input/output pins (I/O
0
through I/O
7
) are placed in a
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), or during a write
operation (CE
LOW, and WE LOW).
18
13
Logic Block Diagram
A
1
A
4
A
5
A
6
A
7
A
12
A
14
A
16
COLUMN
DECODER
ROW DECODER
SENSE AMPS
INPUT BUFFER
POWER
DOWN
WE
OE
I/O
0
I/O
1
I/O
2
I/O
3
512 xK8
ARRAY
I/O
7
I/O
6
I/O
5
I/O
4
A
0
A
2
A
15
A
3
A
CE
A
A
8
A
17
A
9
A
11
A
10
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Page 1 - 4-Mbit (512K x 8) Static RAM

4-Mbit (512K x 8) Static RAMCY62148BN MoBL®Cypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document #:

Page 2

CY62148BN MoBL®Document #: 001-06517 Rev. *A Page 10 of 10Document History PageDocument Title: CY62148BN MoBL® 4-Mbit (512K x 8) Static RAMDocument N

Page 3

CY62148BN MoBL®Document #: 001-06517 Rev. *A Page 2 of 10Note: 1. Typical values are measured at VCC = 5V, TA = 25°C, and are included for reference

Page 4

CY62148BN MoBL®Document #: 001-06517 Rev. *A Page 3 of 10Maximum Ratings(Above which the useful life may be impaired. For user guide-lines, not teste

Page 5

CY62148BN MoBL®Document #: 001-06517 Rev. *A Page 4 of 10Switching Characteristics[5] Over the Operating RangeParameter Description62148BNLL-70UnitMi

Page 6

CY62148BN MoBL®Document #: 001-06517 Rev. *A Page 5 of 10Data Retention Characteristics (Over the Operating Range)Parameter Description Conditions Mi

Page 7

CY62148BN MoBL®Document #: 001-06517 Rev. *A Page 6 of 10Write Cycle No. 1 (CE Controlled)[13]Write Cycle No. 2 (WE Controlled, OE HIGH During Write)

Page 8

CY62148BN MoBL®Document #: 001-06517 Rev. *A Page 7 of 10Write Cycle No.3 (WE Controlled, OE LOW)[13, 14]Truth TableCE OE WE I/O0–I/O7Mode PowerH X X

Page 9

CY62148BN MoBL®Document #: 001-06517 Rev. *A Page 8 of 10Package Diagrams0.546[13.868]0.440[11.176]0.101[2.565]0.050[1.270]0.014[0.355]0.118[2.997]0.

Page 10 - CY62148BN MoBL

CY62148BN MoBL®Document #: 001-06517 Rev. *A Page 9 of 10© Cypress Semiconductor Corporation, 2006. The information contained herein is subject to c

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